View TGA8652-SL_8244100.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

triquint semiconductor texas: (972)994 8465 fax (972)994 8504 email: info-mmw @tqs.com web: www.triquint.com product data sheet december 3, 2009 1 9.9-12.5gb/s optical modulator driver TGA8652-SL oc-192 metro and long haul applications surface mount package key features and performance ? dc - 12 ghz linear bw ? dc - 16 ghz saturated power bw ? 16 db small signal gain ? wide drive range (4v to 8v) ? 25 ps edge rates (10/90) ? low power dissipation (1.4w at vo=8v) ? package size: .350 x .350 x .084 inches. ? evaluation board available. primary applications ? mach-zehnder modulator driver ? pre-driver ? receiver agc description the triquint TGA8652-SL is a medium power wideband agc amplifier combined with off chip circuitry assembled in a surface mount package. the TGA8652-SL typically provides 16db small signal gain with 6db agc range. typical input and output return loss is <10db. typical noise figure is 2.5db at 3ghz. typical saturated output power is 25dbm. small signal 3db bw is 12ghz with saturated power performance to 16ghz. rf ports are dc coupled enabling the user to customize system corner frequencies. applications include oc192 12.5gbit/s nrz mz modulator driver and receive agc amplifier. drain bias may be applied thru the on-chip drain termination resistor for low drive applications or thru the rf output port for high drive applications. a cascaded pair demonstrated 8vpp output voltage swing with 500mvpp at the input when stimulated with 10gbit/s. 2^31-1prbs. nrz data. the TGA8652-SL is available on an evaluation board. cascaded 8652 evaluation boards 12.5 gb/s performance output = 8 vpp, input = 500 mvpp scale: 2 v/div, 20 ps/div measured performance note: datasheet is subject to change without notice.
triquint semiconductor texas: (972)994 8465 fax (972)994 8504 email: info-mmw @tqs.com web: www.triquint.com product data sheet december 3, 2009 2 symbol parameter 1 / value notes v + vd(rfout) positive supply voltage drain bias applied thru on-chip termination drain bias applied at rf output using bias t 12 v 10 v v + id positive supply current drain bias applied thru on-chip termination drain bias applied at rf output using bias t 110 ma 250 ma 2 / p d power dissipation 2.4 w 3 / vg ig negative gate voltage gate current 0 v to ?3 v 5 ma vctrl ictrl control gate voltage gate current vd/2 to ?3 v 5 ma 4 / p in rf input sinusoidal continuous wave power 23 dbm t ch operating channel temperature 200 0 c 5 / 6/ t stg storage temperature -40 to 125 0 c notes: 1/ these ratings represent the ma ximum operable values for the device. 2 / assure the combination of vd and id does not exceed maximum power dissipation rating. 3 / when operated at this bias condition with a base plate temperature of 80 0 c, the median lifetime (tm) is 1e+6 hours. 4 / assure vctrl never exceeds vd during bias on and off sequences, and normal operation. 5 / these ratings apply to each individual fet. 6 / junction operating temperature will directly affect the device lifetime. for maximum life, it is recommended that junction temperatures be maintained at the lowest possible levels. maximum ratings TGA8652-SL
triquint semiconductor texas: (972)994 8465 fax (972)994 8504 email: info-mmw @tqs.com web: www.triquint.com product data sheet december 3, 2009 3 thermal information* parameter test condition t ch ( c) r jc ( c/w) mttf (hrs) r jc thermal resistance (channel to backside of package) vd(rf out) = 6.5 v, vctrl = 1 v, id = 170 ma 5%, t base = 80 c 114.70 31.40 2.6e+7 note: thermal transfer is conducted thru the bottom of the TGA8652-SL package into the motherboard. design the motherboard to assure adequate thermal transfe r to the base plate. an array of filled thermal vias is recommended as shown in the example below. * this information is a result of a thermal model. thermal vias in motherboard area of thermal transfer bottom view TGA8652-SL motherboard TGA8652-SL
triquint semiconductor texas: (972)994 8465 fax (972)994 8504 email: info-mmw @tqs.com web: www.triquint.com product data sheet december 3, 2009 4 rf specifications (t a = 25 c nominal) value note test measurement conditions min typ max units small signal bw 12 ghz saturated power bw 16 ghz 1/, 2 / small-signal gain magnitude 2 and 4 ghz 6 ghz 10 ghz 14 ghz 16 ghz 15 13 13 10 10 16 15 14 13 13 db small signal agc range midband 15 db 1/, 2 / input return loss magnitude 2, 4, 6, and 10 ghz 14 and 18 ghz 9 8 10 10 db 1/, 2 / output return loss magnitude 2, 4, 6, and 10 ghz 14 and 18 ghz 10 8 10 10 db 6/, 7 / saturated output power 2, 4, 6, 8, and 10 ghz 25 dbm 3/, 4 / eye amplitude vd (rfout) = 7 v vd (rfout) = 6 v vd (rfout) = 5 v vd (rfout) = 4.5 v 8.0 7.0 6.0 5.5 vpp 3/, 4 /, 5 / additive jitter (p-p) 5 ps 3/, 4 / rise time (10/90) 25 ps notes: 1 / verified at package level rf probe. 2 / package probe bias: v + = 8 v, adjust vg1 to achieve id = 87 ma, vctrl = +1 v 3 / verified by design, TGA8652-SL assembled ont o a demonstration board shown on page 7 then tested using the application circuit and bias procedure detailed on pages 8 and 9. 4 / vin = 2 v, data rate = 12.5 gb/s, vctr l and vg are adjusted for maximum output. 5 / computed using rss method where jpp_additive = sqrt(jpp_out 2 - jpp_in 2 ) 6 / verified at die level on-wafer probe. 7 / power bias die probe: vdt=8 v, adjust vg to achieve id = 175 ma+/-5%, vctrl = 1.5 v note: at the die level, drain bias is applied th ru the rf output port using a bias tee, voltage is at the dc input to the bias tee. TGA8652-SL
triquint semiconductor texas: (972)994 8465 fax (972)994 8504 email: info-mmw @tqs.com web: www.triquint.com product data sheet december 3, 2009 5 typical measured s-parameters irl orl gain TGA8652-SL
triquint semiconductor texas: (972)994 8465 fax (972)994 8504 email: info-mmw @tqs.com web: www.triquint.com product data sheet december 3, 2009 6 vg vctrl rf(in) rf(out) demonstration board v + TGA8652-SL
triquint semiconductor texas: (972)994 8465 fax (972)994 8504 email: info-mmw @tqs.com web: www.triquint.com product data sheet december 3, 2009 7 12 rf(in) vd(rfout) vg vctrl TGA8652-SL vdt application circuit for 4-8v driver application bias tee (pspl 5542) 11 9 6 3 rf(out) v + (no connection) dc block (pspl 5509) c1 c3 c4 c5 c2 designator description manufacturer part number c1, c3 1uf capacitor mlc ceramic avx 0603yc105kat c2, c4 10 uf capacitor mlc ceramic avx 0603yc106kat c5 0.01 uf capacitor mlc avx 0603yc103kat recommended components: TGA8652-SL
triquint semiconductor texas: (972)994 8465 fax (972)994 8504 email: info-mmw @tqs.com web: www.triquint.com product data sheet december 3, 2009 8 bias on 1. disable the ppg source 2. set vdt = 0v vctrl = 0v and vg = 0v 3. set vg =-1.5 v 4. increase vdt to 8v observing id. - assure id = 0ma 5. set vctrl = +1.0 v - id should still be 0 ma 6. make vg more positive until idd = 175ma . - typical value for vg is -0.3 v 7. enable the ppg source -vin = 2 vpp 8. adjust vctrl for vo = 8vpp 9. adjust vg for 50% crossover bias off 1. disable the output of the ppg 2. set vctrl = 0v 3. set vdt = 0v 4. set vg = 0v bias procedure for 4-8v driver application notes: 1. assure vctrl never exceeds vd dur ing bias on and bias off sequences and during normal operation. TGA8652-SL
triquint semiconductor texas: (972)994 8465 fax (972)994 8504 email: info-mmw @tqs.com web: www.triquint.com product data sheet december 3, 2009 9 typical measured performance on demonstration board 12.5gb/s 2^31-1, vd(rfout) = 7 v cpc = 50% vo=8 v vo=7 v vo=6 v vo=5 v vo = 4 v TGA8652-SL
triquint semiconductor texas: (972)994 8465 fax (972)994 8504 email: info-mmw @tqs.com web: www.triquint.com product data sheet december 3, 2009 10 typical bias conditions vd(rfout) = 7 v notes: 1. vd(rfout)=7 v 2. vin =2 vpp 3. 50% cpc 4. actual bias points may be different. vo(v) 8 7 6 5 4 vg(v) -0.23 -0.31 -0.40 -0.48 -0.54 id(ma) 194 173 144 117 97 vctrl 0.87 0.63 0.37 0.16 0.02 TGA8652-SL
triquint semiconductor texas: (972)994 8465 fax (972)994 8504 email: info-mmw @tqs.com web: www.triquint.com product data sheet december 3, 2009 11 12 rf(in) vd(rfout) vg vctrl TGA8652-SL application circuit for pre-driver and receive application 11 9 6 3 rf(out) v + dc block (pspl 5509) c1 c3 c4 c5 c2 designator description manufacturer part number c1, c3 1uf capacitor mlc ceramic avx 0603yc105kat c2, c4 10 uf capacitor mlc ceramic avx 0603yc106kat c5 0.01 uf capacitor mlc avx 0603yc103kat recommended components: dc block (pspl 5509) TGA8652-SL
triquint semiconductor texas: (972)994 8465 fax (972)994 8504 email: info-mmw @tqs.com web: www.triquint.com product data sheet december 3, 2009 12 bias on 1. disable the ppg source 2. set v + = 0 v, vctrl = 0 v and vg = 0 v 3. set vg = -1.5 v, set vctrl = -0.1v 4. increase v + to 8 v observing id. - assure id = 0 ma 5. make vg more positive until idd = 70 ma . - typical value for vg is -0.5 v 7. enable the ppg source - set vin = 500 mv (amplitude) bias off 1. disable the output of the ppg 2. set vctrl = 0v 3. set vdt = 0v 4. set vg = 0v bias procedure for pre-driver and receive application notes: 1. assure vctrl never exceeds vd dur ing bias on and bias off sequences and during normal operation. TGA8652-SL
triquint semiconductor texas: (972)994 8465 fax (972)994 8504 email: info-mmw @tqs.com web: www.triquint.com product data sheet december 3, 2009 13 mechanical drawing notes: 1. dimensions: inches. tolerance: length and width: +/-.003 inches. height +/-.006 inches. adjacent pad to pad spacing: +/- .0002 inches. pad size: +/- .001 inches. 2. surface mount interface: material: ro4003 (thickness=.008 inches), 1/2oz copper (thickness=.0007 inches) plating finish: 100-350 microinches nickel underplate, with 5-10 microinches flash gold overplate. TGA8652-SL
triquint semiconductor texas: (972)994 8465 fax (972)994 8504 email: info-mmw @tqs.com web: www.triquint.com product data sheet december 3, 2009 14 recommended surface mount package assembly proper esd precautions must be followed while handling packages. clean the board with acetone. rinse with alc ohol. allow the circuit to fully dry. triquint recommends using a conductive solder paste for attachment. follow solder paste and reflow oven vendors? recommendations when developing a solder reflow profile. typical solder reflow profiles are listed in the table below. hand soldering is not recommended. solder paste c an be applied using a stencil printer or dot placement. the volume of solder paste depends on pcb and component layout and should be well controlled to ensure consistent mechanical and electrical performance. this package has little tendency to self-align during reflow . gaas mmic devices are susceptible to damage from electrostatic discharge . proper precautions should be observed during handling, assembly and test. typical solder reflow profiles reflow profile snpb pb free ramp-up rate 3 c/sec 3 c/sec activation time and temperature 60 ? 120 sec @ 140 ? 160 c 60 ? 180 sec @ 150 ? 200 c time above melting point 60 ? 150 sec 60 ? 150 sec max peak temperature 240 c 260 c time within 5 c of peak temperature 10 ? 20 sec 10 ? 20 sec ramp-down rate 4 ? 6 c/sec 4 ? 6 c/sec ordering information part packa g e st y le TGA8652-SL land grid array surface mount TGA8652-SL

▲Up To Search▲

Price & Availability of TGA8652-SL

	To Download TGA8652-SL Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .